Data Transfer Control

About the control of data transfer

The transfer of data between the computer and peripherals is managed by control and status signals carried on the control bus which determine the exact sequencing and timing of I/O operations. Such management is necessary because of the different operating speeds of the computer and its peripherals and because of the multi-tasking operation of many computers. This means that, at any particular instant when a data transfer operation is requested, either the computer or the peripheral may not be ready to take part in the transfer.
Typical control and status lines, and their meaning when set at a logic level of 1, are shown below:

BUSY - Peripheral device busy
READY - Peripheral device ready for data transfer

ENABLE - CPU ready for data transfer
ERROR - Malfunction on peripheral device

Similar control signals are set up by both the computer and the peripherals, but often different conventions are used to define the status of each device. Differing conventions occur particularly when the computer and peripherals come from different manufacturers, and might mean for instance that the computer interprets a logic level of 1 as defining a device to be busy but the peripheral device uses logic level 0 to define 'device busy' on the appropriate control line. Therefore, translation of the control lines between the computer and peripherals is required, which is achieved by a further series of logic gates within the I/O interface.

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